Speaker
Description
A custom Intel Arria 10 SoC FPGA platform, developed for Beam Position Monitors, has been adapted as the core control hardware for the 500 MHz DLLRF system of the Elettra 2.0 upgrade. The architecture features an external RF Front-End down-converting signals to an 18.5 MHz IF, coupled with two FMC boards hosting four ADC channels (16 bits, 120 MS/s) and a DAC output stage with quadrature modulators. The feedback control chain is fully implemented inside the FPGA fabric. The pipeline utilizes a Digital Down Converter with non-IQ demodulation and CIC moving-average filters operating at the 1.1566 MHz Turn-by-Turn rate. CORDIC blocks extract amplitude and phase, which are processed by independent PI controllers equipped with anti-windup and anti-saturation algorithms. A Digital Up Converter converts the values back to I/Q components, driving two DAC channels for quadrature modulation. The entire processing loop achieves a total latency under 2 µs. High-speed SFP+ optical interfaces transfer real-time data at 10 Gb/s, while the SoC HPS manages configuration and diagnostics. The hardware platform design, real-time control implementation, and closed-loop performance will be presented.
| Abstract Classification | Control Hardware Platfroms |
|---|