Speaker
Description
High-frequency pulsed cavity control is emerging as a common requirement across several projects at CERN, including AWAKE, FCC-ee, and a proposed upgrade to CLEAR. This poster presents the design and laboratory commissioning of a pulsed cavity controller built on the MicroTCA platform, using a SIS8300-KU FPGA carrier paired with a DWC8VM1 rear transition module.
RF signals are down-mixed and digitised, with baseband I/Q values recovered by digital down-conversion on the FPGA. Amplitude and phase stability during the pulse are maintained by a proportional-integral controller with pulse-to-pulse feedforward correction, which compensates for repeatable disturbances that fall outside the intra-pulse loop bandwidth. The controller supports arbitrary, tuneable reference waveforms, accommodating complex profiles such as those required for pulse compressor systems. Correction signals are output via a pair of baseband DACs, which drive the DWC8VM1's vector modulator to up-convert to the target RF frequency.
The system has been designed and validated for pulses of a few microseconds at 3 GHz, with the architecture supporting reconfiguration across 350–6000 MHz by changing the rear transition module, allowing reuse of the same platform across projects with different RF frequency requirements. Integration with CERN infrastructure includes direct FESA access to the device's register memory map, enabling operational control and monitoring consistent with existing accelerator control system conventions.
| Abstract Classification | Control Architecture and Strategies |
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