Speaker
Description
Modern digital electronics chips available on the market have reached incredible levels of performance. They enable highly advanced monitoring and control of accelerated beams, with bunch-by-bunch resolution and even beyond. However, this performance comes at a cost: increasing device capabilities also leads to greater complexity, making these technologies less accessible to beginners and often increasing development time.
On the other hand, many applications do not require state-of-the-art performance. In this contribution, we present a project that aims to remain relatively simple while providing intermediate levels of signal-processing and computational performance without compromising reliability.
This project uses an FPGA to achieve precise control at the clock-cycle level. The purpose is to make a beam phase-lock loop, which would then provide a RF signal in phase with the beam for other diagnostics devices. Other applications based on the same hardware platform could later be realised, whether for feedback systems or simply for acquisition and monitoring.
A key requirement for this project was the integration with the control system through TCP/IP, using a generic solution. An additional objective was to favour open-source components and solutions whenever possible, in order to facilitate reuse, adaptation, and long-term maintainability while reducing dependence on proprietary solutions.
| Abstract Classification | Control Architecture and Strategies |
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